Sciweavers

615 search results - page 56 / 123
» Design and Implementation of Parallel Algorithms for Gene-Fi...
Sort
View
VG
2003
13 years 9 months ago
Integrating Pre-Integration Into The Shear-Warp Algorithm
The shear-warp volume rendering algorithm is one of the fastest algorithms for volume rendering, but it achieves this rendering speed only by sacrificing interpolation between th...
Jürgen P. Schulze, Martin Kraus, Ulrich Lang,...
ICDCS
2009
IEEE
14 years 5 months ago
The Impact of Communication Models on Routing-Algorithm Convergence
Autonomous routing algorithms, such as BGP, are intended to reach a globally consistent set of routes after nodes iteratively and independently collect, process, and share network...
Aaron D. Jaggard, Vijay Ramachandran, Rebecca N. W...
ARC
2008
Springer
104views Hardware» more  ARC 2008»
13 years 9 months ago
PARO: Synthesis of Hardware Accelerators for Multi-Dimensional Dataflow-Intensive Applications
Abstract. In this paper, we present the PARO design tool for the automated hardware synthesis of massively parallel embedded architectures for given dataflow dominant applications....
Frank Hannig, Holger Ruckdeschel, Hritam Dutta, J&...
HOTI
2002
IEEE
14 years 22 days ago
Stable Round-Robin Scheduling Algorithms for High-Performance Input Queued Switches
High-performance input-queued switches require highspeed scheduling algorithms while maintaining good performance. Various round-robin scheduling algorithms for Virtual Output Que...
Jing Liu, Chun Kit Hung, Mounir Hamdi, Chi-Ying Ts...
FPL
2001
Springer
101views Hardware» more  FPL 2001»
14 years 8 days ago
An FPGA-Based Syntactic Parser for Real-Life Almost Unrestricted Context-Free Grammars
This paper presents an FPGA-based implementation of a syntactic parser that can process languages generated by almost unrestricted real-life context-free grammars (CFGs). More prec...
Cristian Ciressan, Eduardo Sanchez, Martin Rajman,...