Sciweavers

127 search results - page 20 / 26
» Design and Implementation of Power-Aware Virtual Memory
Sort
View
OSDI
2002
ACM
14 years 7 months ago
Practical, Transparent Operating System Support for Superpages
Most general-purpose processors provide support for memory pages of large sizes, called superpages. Superpages enable each entry in the translation lookaside buffer (TLB) to map a...
Juan Navarro, Sitaram Iyer, Peter Druschel, Alan L...
DATE
2009
IEEE
122views Hardware» more  DATE 2009»
14 years 2 months ago
MTJ-based nonvolatile logic-in-memory circuit, future prospects and issues
—Nonvolatile logic-in-memory architecture, where nonvolatile memory elements are distributed over a logic-circuit plane, is expected to realize both ultra-low-power and reduced i...
Shoun Matsunaga, Jun Hayakawa, Shoji Ikeda, Katsuy...
PLDI
2003
ACM
14 years 22 days ago
Static array storage optimization in MATLAB
An adaptation of the classic register allocation algorithm to the problem of array storage optimization in MATLAB is presented. The method involves the decomposition of an interfe...
Pramod G. Joisha, Prithviraj Banerjee
HPDC
1997
IEEE
13 years 11 months ago
Cut-Through Delivery in Trapeze: An Exercise in Low-Latency Messaging
New network technology continues to improve both the latency and bandwidth of communication in computer clusters. The fastest high-speed networks approach or exceed the I/O bus ba...
Ken Yocum, Jeffrey S. Chase, Andrew J. Gallatin, A...
MICRO
2008
IEEE
103views Hardware» more  MICRO 2008»
14 years 1 months ago
Testudo: Heavyweight security analysis via statistical sampling
Heavyweight security analysis systems, such as taint analysis and dynamic type checking, are powerful technologies used to detect security vulnerabilities and software bugs. Tradi...
Joseph L. Greathouse, Ilya Wagner, David A. Ramos,...