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IPPS
2008
IEEE
14 years 2 months ago
Design of scalable dense linear algebra libraries for multithreaded architectures: the LU factorization
The scalable parallel implementation, targeting SMP and/or multicore architectures, of dense linear algebra libraries is analyzed. Using the LU factorization as a case study, it is...
Gregorio Quintana-Ortí, Enrique S. Quintana...
PLDI
2011
ACM
12 years 10 months ago
Caisson: a hardware description language for secure information flow
Information flow is an important security property that must be incorporated from the ground up, including at hardware design time, to provide a formal basis for a system’s roo...
Xun Li 0001, Mohit Tiwari, Jason Oberg, Vineeth Ka...
WDAG
1998
Springer
107views Algorithms» more  WDAG 1998»
13 years 12 months ago
Transient Fault Detectors
We present fault detectors for transient faults, (i.e. corruptions of the memory of the processors, but not of the code of the processors). We distinguish fault detectors for tasks...
Joffroy Beauquier, Sylvie Delaët, Shlomi Dole...
DAC
2006
ACM
14 years 8 months ago
Shielding against design flaws with field repairable control logic
Correctness is a paramount attribute of any microprocessor design; however, without novel technologies to tame the increasing complexity of design verification, the amount of bugs...
Ilya Wagner, Valeria Bertacco, Todd M. Austin
DATE
2007
IEEE
142views Hardware» more  DATE 2007»
14 years 2 months ago
Optimizing instruction-set extensible processors under data bandwidth constraints
We present a methodology for generating optimized architectures for data bandwidth constrained extensible processors. We describe a scalable Integer Linear Programming (ILP) formu...
Kubilay Atasu, Robert G. Dimond, Oskar Mencer, Way...