243 search results - page 2 / 49 » Design and Implementation of a CFAR Processor for Target Det... |
VLSISP
2008
13 years 8 months ago
2008
ADRES (Architecture for Dynamically Reconfigurable Embedded Systems) is a templatized coarse-grained reconfigurable processor architecture. It targets at embedded applications whic...
DATE
2006
IEEE
14 years 2 months ago
2006
IEEE
In this paper the concept of a reconfigurable hardware macro to be used as a generic building block in lowpower, low-cost SoC for multioperable GNSS positioning is described, feat...
IPPS
2005
IEEE
14 years 2 months ago
2005
IEEE
Soft-core processors exploit the flexibility of Field Programmable Gate Arrays (FPGAs) to allow a system designer to customize the processor to the needs of a target application....
ARITH
2009
IEEE
14 years 22 days ago
2009
IEEE
This paper deals with the design and implementation of low latency software for binary floating-point division with correct rounding to nearest. The approach we present here targe...
CODES
1999
IEEE
14 years 1 months ago
1999
IEEE
This paper introduces a flexible code generation framework dedicated to the design of application specific programmable processors. This tool allows the user to build specific com...