243 search results - page 5 / 49 » Design and Implementation of a CFAR Processor for Target Det... |
DAC
1997
ACM
13 years 12 months ago
1997
ACM
The paper presents an algorithm to determine the close-tosmallest possible data buffer sizes for arbitrary synchronous data flow (SDF) applications, such that we can guarantee the...
JIRS
2007
13 years 7 months ago
2007
A detailed step-by-step approach is presented to optimize, standardize, and automate the process of unmanned vehicle controller design, evaluation, validation and verification, fol...
ISCI
2011
13 years 2 months ago
2011
It is well known that software maintenance and evolution are expensive activities, both in terms of invested time and money. Reverse engineering activities support the obtainment ...
MICRO
2000
IEEE
13 years 11 months ago
2000
IEEE
Conventional microarchitectures choose a single memory hierarchy design point targeted at the average application. In this paper, we propose a cache and TLB layout and design that...
SIGADA
2001
Springer
14 years 3 days ago
2001
Springer
The last years have seen an increasing, albeit restricted simulation of large-scale networks on shared memory parallel platforms. As the complexity of communication protocols and ...