Sciweavers

559 search results - page 77 / 112
» Design and Implementation of a Dynamic-Reconfigurable Archit...
Sort
View
ICCCN
2007
IEEE
14 years 1 months ago
Low-Latency Multichannel Wireless Mesh Networks
—Multimedia requirements of the 1990’s drove wired and optical network architects to reconsider the inefficiencies of packet switching and consider long proven methods such as...
Robert McTasney, Dirk Grunwald, Douglas C. Sicker
HPCA
2007
IEEE
14 years 8 months ago
A Scalable, Non-blocking Approach to Transactional Memory
Transactional Memory (TM) provides mechanisms that promise to simplify parallel programming by eliminating the need for locks and their associated problems (deadlock, livelock, pr...
Hassan Chafi, Jared Casper, Brian D. Carlstrom, Au...
DAC
2007
ACM
14 years 8 months ago
A System For Coarse Grained Memory Protection In Tiny Embedded Processors
Many embedded systems contain resource constrained microcontrollers where applications, operating system components and device drivers reside within a single address space with no...
Ram Kumar, Akhilesh Singhania, Andrew Castner, Edd...
VLSID
2002
IEEE
152views VLSI» more  VLSID 2002»
14 years 8 months ago
Verification of an Industrial CC-NUMA Server
Directed test program-based verification or formal verification methods are usually quite ineffective on large cachecoherent, non-uniform memory access (CC-NUMA) multiprocessors b...
Rajarshi Mukherjee, Yozo Nakayama, Toshiya Mima
VLSID
2008
IEEE
191views VLSI» more  VLSID 2008»
14 years 2 months ago
Programming and Performance Modelling of Automotive ECU Networks
The last decade has seen a phenomenal increase in the use of electronic components in automotive systems, resulting in the replacement of purely mechanical or hydraulic-implementa...
Samarjit Chakraborty, Sethu Ramesh