Sciweavers

1522 search results - page 241 / 305
» Design and Implementation of a Policy-based Resource Managem...
Sort
View
VLSID
2007
IEEE
231views VLSI» more  VLSID 2007»
16 years 4 months ago
AHIR: A Hardware Intermediate Representation for Hardware Generation from High-level Programs
We present AHIR, an intermediate representation (IR), that acts as a transition layer between software compilation and hardware synthesis. Such a transition layer is intended to t...
Sameer D. Sahasrabuddhe, Hakim Raja, Kavi Arya, Ma...
124
Voted
VLSID
2005
IEEE
128views VLSI» more  VLSID 2005»
16 years 4 months ago
On-Line Synthesis for Partially Reconfigurable FPGAs
An important application of dynamically and partially reconfigurable computing platforms is in dynamic task allocation and execution. On-line synthesis, on-line placement and on-l...
Renqiu Huang, Ranga Vemuri
DATE
2009
IEEE
88views Hardware» more  DATE 2009»
15 years 11 months ago
Latency criticality aware on-chip communication
—Packet-switched interconnect fabric is a promising on-chip communication solution for many-core architectures. It offers high throughput and excellent scalability for on-chip da...
Zheng Li, Jie Wu, Li Shang, Robert P. Dick, Yihe S...
SFM
2005
Springer
243views Formal Methods» more  SFM 2005»
15 years 10 months ago
Hermes: Agent-Based Middleware for Mobile Computing
Hermes is a middleware system for design and execution of activity-based applications in distributed environments. It supports mobile computation as an application implementation s...
Flavio Corradini, Emanuela Merelli
SEM
2004
Springer
15 years 10 months ago
PlanetSim: A New Overlay Network Simulation Framework
Abstract. Current research in peer to peer systems is lacking appropriate environments for simulation and experimentation of large scale overlay services. This has led to a plethor...
Pedro García López, Carles Pairot, R...