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VLSID
2006
IEEE
158views VLSI» more  VLSID 2006»
15 years 10 months ago
Programmable LDPC Decoder Based on the Bubble-Sort Algorithm
Low density parity check (LDPC) codes are one of the most powerful error correcting codes known. Recent research have pointed out their potential for a low cost, low latency hardw...
Rohit Singhal, Gwan S. Choi, Rabi N. Mahapatra
GRID
2007
Springer
15 years 4 months ago
A Tool for Prioritizing DAGMan Jobs and its Evaluation
It is often difficult to perform efficiently a collection of jobs with complex job dependencies due to temporal unpredictability of the grid. One way to mitigate the unpredictabili...
Grzegorz Malewicz, Ian T. Foster, Arnold L. Rosenb...
SIGMOD
2008
ACM
140views Database» more  SIGMOD 2008»
16 years 4 months ago
Relational joins on graphics processors
We present a novel design and implementation of relational join algorithms for new-generation graphics processing units (GPUs). The most recent GPU features include support for wr...
Bingsheng He, Ke Yang, Rui Fang, Mian Lu, Naga K. ...
COORDINATION
2009
Springer
16 years 5 months ago
Multicore Scheduling for Lightweight Communicating Processes
Process-oriented programming is a design methodology in which software applications are constructed from communicating concurrent processes. A process-oriented design is typically ...
Carl G. Ritson, Adam T. Sampson, Fred R. M. Barnes
INFOCOM
2007
IEEE
15 years 10 months ago
Iterative Scheduling Algorithms
— The input-queued switch architecture is widely used in Internet routers due to its ability to run at very high line speeds. A central problem in designing an input-queued switc...
Mohsen Bayati, Balaji Prabhakar, Devavrat Shah, Ma...