1224 search results - page 119 / 245 » Design and Implementation of a Practical Parallel Delaunay A... |
151
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DAC
2002
ACM
16 years 5 months ago
2002
ACM
The design of high-throughput large-state Viterbi decoders relies on the use of multiple arithmetic units. The global communication channels among these parallel processors often ...
129
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PODC
1994
ACM
15 years 8 months ago
1994
ACM
In this paper, we investigate the practical performance of lock-free techniques that provide synchronization on shared-memory multiprocessors. Our goal is to provide a technique t...
141
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PPOPP
2010
ACM
15 years 11 months ago
2010
ACM
To fully exploit multicore processors, applications are expected to provide a large degree of thread-level parallelism. While adequate for low core counts and their typical worklo...
150
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PDCAT
2007
Springer
15 years 10 months ago
2007
Springer
ct There have been many previous attempts to accelerate MT19937 using FPGAs but we believe that we can substantially improve the previous implementations to develop a higher throug...
198
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LCPC
2009
Springer
15 years 9 months ago
2009
Springer
Programming heterogeneous parallel computer systems is notoriously difficult, but MIMD models have proven to be portable across multi-core processors, clusters, and massively paral...