Sciweavers

164 search results - page 10 / 33
» Design and Implementation of the Memory Scheduler for the PC...
Sort
View
ICPADS
2006
IEEE
14 years 2 months ago
Memory and Network Bandwidth Aware Scheduling of Multiprogrammed Workloads on Clusters of SMPs
Symmetric Multiprocessors (SMPs), combined with modern interconnection technologies are commonly used to build cost-effective compute clusters. However, contention among processor...
Evangelos Koukis, Nectarios Koziris
RTAS
2008
IEEE
14 years 3 months ago
A Switch Design for Real-Time Industrial Networks
The convergence of computers and the physical world is the theme for next generation networking research. This trend calls for real-time network infrastructure, which requires a h...
Qixin Wang, Sathish Gopalakrishnan, Xue Liu, Lui S...
RTAS
2010
IEEE
13 years 7 months ago
DARTS: Techniques and Tools for Predictably Fast Memory Using Integrated Data Allocation and Real-Time Task Scheduling
—Hardware-managed caches introduce large amounts of timing variability, complicating real-time system design. One alternative is a memory system with scratchpad memories which im...
Sangyeol Kang, Alexander G. Dean
HPCA
2006
IEEE
14 years 9 months ago
Store vectors for scalable memory dependence prediction and scheduling
Allowing loads to issue out-of-order with respect to earlier unresolved store addresses is very important for extracting parallelism in large-window superscalar processors. Blindl...
Samantika Subramaniam, Gabriel H. Loh
CASES
2003
ACM
14 years 2 months ago
Programming challenges in network processor deployment
Programming multi-processor ASIPs, such as network processors, remains an art due to the wide variety of architectures and due to little support for exploring different implement...
Chidamber Kulkarni, Matthias Gries, Christian Saue...