164 search results - page 20 / 33 » Design and Implementation of the Memory Scheduler for the PC... |
IPPS
1998
IEEE
14 years 1 months ago
1998
IEEE
Abstract. The nano-threads programming model was proposed to effectively integrate multiprogramming on shared-memory multiprocessors, with the exploitation of fine-grain parallelis...
DAC
2002
ACM
14 years 9 months ago
2002
ACM
Previous work on DRAM power-mode management focused on hardware-based techniques and compiler-directed schemes to explicitly transition unused memory modules to low-power operatin...
PPL
2008
13 years 8 months ago
2008
This discussion paper explores the problems of operating systems support when implementing concurrency controls at the level of the instruction set in processors designed for mult...
FPL
2006
Springer
14 years 14 days ago
2006
Springer
In this paper we present the design and implementation of a dynamically reconfigurable system for packet queue scheduling. Two widely accepted queue schedulers have been implement...
CASES
2006
ACM
14 years 16 days ago
2006
ACM
Packet classification is crucial for the Internet to provide more value-added services and guaranteed quality of service. Besides hardware-based solutions, many software-based cla...