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» Design and Implementation of the NUMAchine Multiprocessor
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CODES
2006
IEEE
14 years 2 months ago
Heterogeneous multiprocessor implementations for JPEG: : a case study
Heteregenous multiprocessor SoCs are becoming a reality, largely due to the abundance of transistors, intellectual property cores and powerful design tools. In this project, we ex...
Seng Lin Shee, Andrea Erdos, Sri Parameswaran
ICS
1993
Tsinghua U.
14 years 15 days ago
Anatomy of a Message in the Alewife Multiprocessor
Shared-memory provides a uniform and attractive mechanism for communication. For efficiency, it is often implemented with a layer of interpretive hardware on top of a message-pas...
John Kubiatowicz, Anant Agarwal
DAGSTUHL
2007
13 years 10 months ago
Parallelism through Digital Circuit Design
Abstract. Two ways to exploit chips with a very large number of transistors are multicore processors and programmable logic chips. Some data parallel algorithms can be executed e...
John O'Donnell
DAC
2010
ACM
13 years 8 months ago
RAMP gold: an FPGA-based architecture simulator for multiprocessors
We present RAMP Gold, an economical FPGA-based architecture simulator that allows rapid early design-space exploration of manycore systems. The RAMP Gold prototype is a high-throu...
Zhangxi Tan, Andrew Waterman, Rimas Avizienis, Yun...
DAC
2011
ACM
12 years 8 months ago
ChronOS Linux: a best-effort real-time multiprocessor Linux kernel
We present ChronOS Linux, a best-effort real-time Linux kernel for chip multiprocessors (CMPs). ChronOS addresses the intersection of three problem spaces: a) OS-support for obta...
Matthew Dellinger, Piyush Garyali, Binoy Ravindran