862 search results - page 143 / 173 » Design and Implementation of the TRIPS Primary Memory System |
ASPLOS
2009
ACM
14 years 8 months ago
2009
ACM
The growth in complexity of modern systems makes it increasingly difficult to extract high-performance. The software stacks for such systems typically consist of multiple layers a...
ACMACE
2005
ACM
14 years 28 days ago
2005
ACM
There have been a number of interactive games created for Augmented Reality (AR) environments. In this paper, interaction techniques to support Real-Time Strategy (RTS) games in A...
ISCA
2010
IEEE
13 years 9 months ago
2010
IEEE
This paper explores the design space of MMU caches that accelerate virtual-to-physical address translation in processor architectures, such as x86-64, that use a radix tree page t...
OSDI
2002
ACM
14 years 7 months ago
2002
ACM
Combining high performance with low power consumption is becoming one of the primary objectives of processor designs. Instead of relying just on sleep mode for conserving power, a...
FPGA
1995
ACM
13 years 11 months ago
1995
ACM
During the development of computer peripherals which interface to the processor via the system bus it is often necessary to acquire the signals on the bus at the hardware level. I...