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» Design and Implementation of the TRIPS Primary Memory System
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ISCA
2010
IEEE
305views Hardware» more  ISCA 2010»
14 years 1 months ago
Rethinking DRAM design and organization for energy-constrained multi-cores
DRAM vendors have traditionally optimized the cost-perbit metric, often making design decisions that incur energy penalties. A prime example is the overfetch feature in DRAM, wher...
Aniruddha N. Udipi, Naveen Muralimanohar, Niladris...
LCTRTS
2009
Springer
14 years 3 months ago
Software transactional memory for multicore embedded systems
Embedded systems, like general-purpose systems, can benefit from parallel execution on a symmetric multicore platform. Unfortunately, concurrency issues present in general-purpos...
Jennifer Mankin, David R. Kaeli, John Ardini
SIGMETRICS
2008
ACM
214views Hardware» more  SIGMETRICS 2008»
13 years 8 months ago
HMTT: a platform independent full-system memory trace monitoring system
Memory trace analysis is an important technology for architecture research, system software (i.e., OS, compiler) optimization, and application performance improvements. Many appro...
Yungang Bao, Mingyu Chen, Yuan Ruan, Li Liu, Jianp...
HPCA
2007
IEEE
14 years 8 months ago
A Scalable, Non-blocking Approach to Transactional Memory
Transactional Memory (TM) provides mechanisms that promise to simplify parallel programming by eliminating the need for locks and their associated problems (deadlock, livelock, pr...
Hassan Chafi, Jared Casper, Brian D. Carlstrom, Au...
CIMCA
2005
IEEE
14 years 2 months ago
Carnival - A low cost solution to Interactive Movie on Demand System
This paper aims at describing Carnival, a movie on demand system that provides Movie on demand service by implementing low cost storage architecture for movie storage server. Carn...
Sachin Agarwal 0002, Raman Mittal, Aayush Deep Gar...