Sciweavers

862 search results - page 68 / 173
» Design and Implementation of the TRIPS Primary Memory System
Sort
View
PVM
2010
Springer
15 years 2 months ago
Enabling Concurrent Multithreaded MPI Communication on Multicore Petascale Systems
With the ever-increasing numbers of cores per node on HPC systems, applications are increasingly using threads to exploit the shared memory within a node, combined with MPI across ...
Gábor Dózsa, Sameer Kumar, Pavan Bal...
CCS
2008
ACM
15 years 6 months ago
A fast real-time memory authentication protocol
We propose a new real-time authentication scheme for memory. As in previous proposals the scheme uses a Merkle tree to guarantee dynamic protection of memory. We use the universal...
Yin Hu, Ghaith Hammouri, Berk Sunar
HPCC
2005
Springer
15 years 10 months ago
Lazy Home-Based Protocol: Combining Homeless and Home-Based Distributed Shared Memory Protocols
Abstract. This paper presents our novel protocol design and implementation of an all-software page-based DSM system. The protocol combines the advantages of homeless and home-based...
Byung-Hyun Yu, Paul Werstein, Martin K. Purvis, St...
MICRO
2010
IEEE
242views Hardware» more  MICRO 2010»
15 years 2 months ago
ASF: AMD64 Extension for Lock-Free Data Structures and Transactional Memory
Advanced Synchronization Facility (ASF) is an AMD64 hardware extension for lock-free data structures and transactional memory. It provides a speculative region that atomically exec...
Jae-Woong Chung, Luke Yen, Stephan Diestelhorst, M...
ICCAD
1994
IEEE
105views Hardware» more  ICCAD 1994»
15 years 8 months ago
Register assignment through resource classification for ASIP microcode generation
Application Specific Instruction-Set Processors (ASIPs) offer designers the ability for high-speed data and control processing with the added flexibility needed for late design sp...
Clifford Liem, Trevor C. May, Pierre G. Paulin