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ETRICS
2006
13 years 11 months ago
Possibilistic Information Flow Control in MAKS and Action Refinement
Abstract. Formal methods emphasizes the need for a top-down approach when developing large reliable software systems. Refinements are map step by step abstract algebraic specificat...
Dieter Hutter
ASYNC
2007
IEEE
129views Hardware» more  ASYNC 2007»
13 years 11 months ago
Formal Verification of CHP Specifications with CADP Illustration on an Asynchronous Network-on-Chip
Few formal verification techniques are currently available for asynchronous designs. In this paper, we describe a new approach for the formal verification of asynchronous architec...
Gwen Salaün, Wendelin Serwe, Yvain Thonnart, ...
JTRES
2010
ACM
13 years 7 months ago
Static checking of safety critical Java annotations
The Safety Critical Java Specification intends to support the development of programs that must be certified. The specification includes a number of annotations used to constrain ...
Daniel Tang, Ales Plsek, Jan Vitek
ICST
2009
IEEE
13 years 5 months ago
Putting Formal Specifications under the Magnifying Glass: Model-based Testing for Validation
A software development process is conceptually an abstract form of model transformation, starting from an enduser model of requirements, through to a system model for which code c...
Emine G. Aydal, Richard F. Paige, Mark Utting, Jim...
CORR
2010
Springer
59views Education» more  CORR 2010»
13 years 6 months ago
Refinement and Verification of Real-Time Systems
This paper discusses highly general mechanisms for specifying the refinement of a real-time system as a collection of lower level parallel components that preserve the timing and ...
Paul Z. Kolano, Carlo A. Furia, Richard A. Kemmere...