Sciweavers

529 search results - page 54 / 106
» Design and Test Space Exploration of Transport-Triggered Arc...
Sort
View
EHCI
2001
13 years 10 months ago
Modelling and Using Sensed Context Information in the Design of Interactive Applications
We present a way of analyzing sensed context information formulated to help in the generation, documentation and assessment of the designs of context-aware applications. Starting w...
Philip D. Gray, Daniel Salber
IJNSEC
2008
106views more  IJNSEC 2008»
13 years 8 months ago
Parallel Hardware Architectures for the Cryptographic Tate Pairing
Identity-based cryptography uses pairing functions,which are sophisticated bilinear maps defined on elliptic curves.Computing pairings efficiently in software is presently a relev...
Guido Marco Bertoni, Luca Breveglieri, Pasqualina ...
TVLSI
1998
109views more  TVLSI 1998»
13 years 8 months ago
Power estimation of embedded systems: a hardware/software codesign approach
— The need for low-power embedded systems has become very significant within the microelectronics scenario in the most recent years. A power-driven methodology is mandatory duri...
William Fornaciari, Paolo Gubian, Donatella Sciuto...
ICASSP
2008
IEEE
14 years 3 months ago
Automatic synthesis of VLSI architectures for arbitrary lifting-based filter banks and transforms
Recently, the conventional lifting scheme that is widely used for the construction of Wavelets and 2-channel filter banks has been extended to M-channel filter banks (M > 2)....
Ruben Bartholomä, Thomas Greiner, Frank Kesel...
LCTRTS
1999
Springer
14 years 1 months ago
Optimizing for Reduced Code Space using Genetic Algorithms
Code space is a critical issue facing designers of software for embedded systems. Many traditional compiler optimizations are designed to reduce the execution time of compiled cod...
Keith D. Cooper, Philip J. Schielke, Devika Subram...