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DATE
2007
IEEE
142views Hardware» more  DATE 2007»
14 years 3 months ago
Optimizing instruction-set extensible processors under data bandwidth constraints
We present a methodology for generating optimized architectures for data bandwidth constrained extensible processors. We describe a scalable Integer Linear Programming (ILP) formu...
Kubilay Atasu, Robert G. Dimond, Oskar Mencer, Way...
NOCS
2007
IEEE
14 years 3 months ago
Fast, Accurate and Detailed NoC Simulations
Network-on-Chip (NoC) architectures have a wide variety of parameters that can be adapted to the designer’s requirements. Fast exploration of this parameter space is only possib...
Pascal T. Wolkotte, Philip K. F. Hölzenspies,...
ASPDAC
2006
ACM
124views Hardware» more  ASPDAC 2006»
14 years 2 months ago
Functional modeling techniques for efficient SW code generation of video codec applications
–Architectures with multiple programmable cores are becoming more attractive for video codec applications because they can provide highly concurrent computation and support multi...
Sang-Il Han, Soo-Ik Chae, Ahmed Amine Jerraya
DAC
2006
ACM
13 years 10 months ago
A fast HW/SW FPGA-based thermal emulation framework for multi-processor system-on-chip
With the growing complexity in consumer embedded products and the improvements in process technology, Multi-Processor SystemOn-Chip (MPSoC) architectures have become widespread. T...
David Atienza, Pablo Garcia Del Valle, Giacomo Pac...
CSMR
2004
IEEE
14 years 16 days ago
The Weighted Combined Algorithm: A Linkage Algorithm for Software Clustering
Software systems need to evolve as business requirements, technology and environment change. As software is modified to accommodate the required changes, its structure deteriorate...
Onaiza Maqbool, Haroon A. Babri