254 search results - page 10 / 51 » Design and VLSI Implementation of a Unified Synapse-Neuron A... |
GLVLSI
2005
IEEE
14 years 1 months ago
2005
IEEE
In this paper we propose an FPGA implementation of a multi protocol Weighted Fair (WF) queuing algorithm able to handle variable length packets targeted for Packet Over Sonet (POS...
VLSID
2004
IEEE
14 years 7 months ago
2004
IEEE
We present a new design of an Embedded Speech Recognition System. It combines the aspects of both hardware and software design to implement a speaker dependent, isolated word, sma...
ICASSP
2011
IEEE
12 years 11 months ago
2011
IEEE
Abstract—Accurate spike sorting is important for neuroscientific and neuroprosthetic applications. The sorting of spikes depends on the features extracted from the neural wavefo...
DAC
1999
ACM
14 years 8 months ago
1999
ACM
We propose a new VLSI layout methodology which addresses the main problems faced in Deep Sub-Micron (DSM) integrated circuit design. Our layout "fabric" scheme eliminate...
VLSI
2010
Springer
13 years 5 months ago
2010
Springer
—Latency insensitivity is a promising design paradigm in the nanometer era since it has potential benefits of increased modularity and robustness to variations. Synchronous elas...