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SECON
2010
IEEE
13 years 4 months ago
Coexistence-Aware Scheduling for Wireless System-on-a-Chip Devices
Abstract--Today's mobile devices support many wireless technologies to achieve ubiquitous connectivity. Economic and energy constraints, however, drive the industry to impleme...
Lei Yang, Vinod Kone, Xue Yang, York Liu, Ben Y. Z...
ASAP
2004
IEEE
101views Hardware» more  ASAP 2004»
13 years 10 months ago
Register Organization for Enhanced On-Chip Parallelism
Large register file with multiple ports is a critical component of a high-performance processor. A large number of registers are necessary for processing a larger number of in-fli...
Rama Sangireddy
MICRO
2008
IEEE
137views Hardware» more  MICRO 2008»
13 years 6 months ago
Verification of chip multiprocessor memory systems using a relaxed scoreboard
Verification of chip multiprocessor memory systems remains challenging. While formal methods have been used to validate protocols, simulation is still the dominant method used to ...
Ofer Shacham, Megan Wachs, Alex Solomatnikov, Amin...
TC
2008
13 years 6 months ago
Secure Memory Accesses on Networks-on-Chip
Security is gaining relevance in the development of embedded devices. Toward a secure system at each level of design, this paper addresses security aspects related to Network-on-Ch...
Leandro Fiorin, Gianluca Palermo, Slobodan Lukovic...
ISCA
2007
IEEE
182views Hardware» more  ISCA 2007»
14 years 1 months ago
Configurable isolation: building high availability systems with commodity multi-core processors
High availability is an increasingly important requirement for enterprise systems, often valued more than performance. Systems designed for high availability typically use redunda...
Nidhi Aggarwal, Parthasarathy Ranganathan, Norman ...