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» Design and evaluation of an auto-memoization processor
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ACSC
2009
IEEE
15 years 11 months ago
Fast and Compact Hash Tables for Integer Keys
A hash table is a fundamental data structure in computer science that can offer rapid storage and retrieval of data. A leading implementation for string keys is the cacheconscious...
Nikolas Askitis
145
Voted
CCGRID
2009
IEEE
15 years 10 months ago
Improving Parallel Write by Node-Level Request Scheduling
In a cluster of multiple processors or cpu-cores, many processes may run on each compute node. Each process tends to issue contiguous I/O requests for snapshot, checkpointing or s...
Kazuki Ohta, Hiroya Matsuba, Yutaka Ishikawa
138
Voted
DATE
2009
IEEE
110views Hardware» more  DATE 2009»
15 years 10 months ago
Light NUCA: A proposal for bridging the inter-cache latency gap
Abstract—To deal with the “memory wall” problem, microprocessors include large secondary on-chip caches. But as these caches enlarge, they originate a new latency gap between...
Darío Suárez Gracia, Teresa Monreal,...
151
Voted
IPPS
2009
IEEE
15 years 10 months ago
Using hardware transactional memory for data race detection
Abstract—Widespread emergence of multicore processors will spur development of parallel applications, exposing programmers to degrees of hardware concurrency hitherto unavailable...
Shantanu Gupta, Florin Sultan, Srihari Cadambi, Fr...
DATE
2008
IEEE
133views Hardware» more  DATE 2008»
15 years 10 months ago
Memory Organization with Multi-Pattern Parallel Accesses
We propose an interleaved memory organization supporting multi-pattern parallel accesses in twodimensional (2D) addressing space. Our proposal targets computing systems with high ...
Arseni Vitkovski, Georgi Kuzmanov, Georgi Gaydadji...