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» Design and evaluation of an auto-memoization processor
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TVLSI
2002
84views more  TVLSI 2002»
13 years 7 months ago
Application of instruction analysis/scheduling techniques to resource allocation of superscalar processors
This paper presents the development of instruction analysis/scheduling CAD techniques to measure the distribution of functional unit usage and the micro operation level parallelis...
Ing-Jer Huang, Ping-Huei Xie
DAC
2010
ACM
13 years 11 months ago
Efficient fault simulation on many-core processors
Fault simulation is essential in test generation, design for test and reliability assessment of integrated circuits. Reliability analysis and the simulation of self-test structure...
Michael A. Kochte, Marcel Schaal, Hans-Joachim Wun...
HPCA
1998
IEEE
13 years 12 months ago
The Impact of Data Transfer and Buffering Alternatives on Network Interface Design
The explosive growth in the performance of microprocessors and networks has created a new opportunity to reduce the latency of fine-grain communication. Microprocessor clock speed...
Shubhendu S. Mukherjee, Mark D. Hill
EXPCS
2007
13 years 11 months ago
Empirical performance assessment using soft-core processors on reconfigurable hardware
Simulation has been the de facto standard method for performance evaluation of newly proposed ideas in computer architecture for many years. While simulation allows for theoretica...
Richard Hough, Praveen Krishnamurthy, Roger D. Cha...
IPPS
1998
IEEE
13 years 12 months ago
A Clustered Approach to Multithreaded Processors
With aggressive superscalar processors delivering diminishing returns, alternate designs that make good use of the increasing chip densities are actively being explored. One such ...
Venkata Krishnan, Josep Torrellas