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» Design and evaluation of an auto-memoization processor
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ISCA
2012
IEEE
243views Hardware» more  ISCA 2012»
13 years 6 months ago
Lane decoupling for improving the timing-error resiliency of wide-SIMD architectures
A significant portion of the energy dissipated in modern integrated circuits is consumed by the overhead associated with timing guardbands that ensure reliable execution. Timing ...
Evgeni Krimer, Patrick Chiang, Mattan Erez
MICRO
2003
IEEE
125views Hardware» more  MICRO 2003»
15 years 9 months ago
WaveScalar
Silicon technology will continue to provide an exponential increase in the availability of raw transistors. Effectively translating this resource into application performance, how...
Steven Swanson, Ken Michelson, Andrew Schwerin, Ma...
DAC
2008
ACM
16 years 5 months ago
A reconfigurable routing algorithm for a fault-tolerant 2D-Mesh Network-on-Chip
In this paper we present a reconfigurable routing algorithm for a 2D-Mesh Network-on-Chip (NoC) dedicated to faulttolerant, Massively Parallel Multi-Processors Systems on Chip (MP...
Zhen Zhang, Alain Greiner, Sami Taktak
IPPS
2009
IEEE
15 years 10 months ago
Resource allocation strategies for constructive in-network stream processing
We consider the operator mapping problem for in-network stream processing, i.e., the application of a tree of operators in steady-state to multiple data objects that are continuou...
Anne Benoit, Henri Casanova, Veronika Rehn-Sonigo,...
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IPPS
2009
IEEE
15 years 10 months ago
An analysis of the impact of multi-threading on communication performance
Although processors become massively multicore and therefore new programming models mix message passing and multi-threading, the effects of threads on communication libraries rema...
François Trahay, Elisabeth Brunet, Alexandr...