97 search results - page 8 / 20 » Design and implementation of JPEG encoder IP core |
CCR
2004
13 years 7 months ago
2004
IP address lookup is challenging for high performance routers because it requires a longest matching prefix at speeds of up to 10 Gbps (OC-192). Existing solutions have poor updat...
CSE
2008
IEEE
13 years 9 months ago
2008
IEEE
A well-known challenge during processor design is to obtain best possible results for a typical target application domain by combining flexibility and computational performance. A...
TODAES
2008
13 years 7 months ago
2008
The extremely high cost of custom ASIC fabrication makes FPGAs an attractive alternative for deployment of custom hardware. Embedded systems based on reconfigurable hardware integ...
CODES
2005
IEEE
14 years 1 months ago
2005
IEEE
In order to meet flexibility, performance and energy efficiency constraints, future SoC (System-on-Chip) designs will contain an increasing number of heterogeneous processor cor...
ICASSP
2008
IEEE
14 years 1 months ago
2008
IEEE
In this paper, we propose a systemic approach for synthesizing field-programmable gate array (FPGA) implementations of fast Fourier transform (FFT) computations. Our approach cons...