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» Design and implementation of a multicast-buffer ATM switch
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ASPDAC
2000
ACM
104views Hardware» more  ASPDAC 2000»
13 years 11 months ago
Design of digital neural cell scheduler for intelligent IB-ATM switch
— We present the architecture of the ATM banyan switch composed of pattern process and high-speed digital neural cell scheduler. An input buffer type ATM switch with a window-bas...
J.-K. Lee, Seung-Min Lee, Mike Myung-Ok Lee, D.-W....
HPDC
1996
IEEE
13 years 11 months ago
Multimedia Multiparty Services to Native ATM Desktops
Telecommunications, Computing, and Video Technologies are rapidly converging, creating a new multimedia industry that will serve emerging markets on the information highways. To s...
H. Ouibrahim, J. A. van den Broecke

Publication
233views
15 years 5 months ago
Design Considerations for the Virtual Source/Virtual Destination (VS/VD) Feature in the ABR Service of ATM Networks
The Available Bit Rate (ABR) service in ATM networks has been specified to allow fair and efficient support of data applications over ATM utilizing capacity left over after servici...
Shiv Kalyanaraman, Raj Jain, Jianping Jiang, Rohit...
INFOCOM
1997
IEEE
13 years 11 months ago
Design of a Gigabit ATM Switch
This paper describes the design and implementation of a gigabit ATM switching system supporting link rates from 150 Mb/s to 2.4 Gb/s, with a uniquely e cient multicastswitch archi...
Thomas J. Chaney, J. Andrew Fingerhut, Margaret Fl...