13101 search results - page 112 / 2621 » Design and implementation of an |
117
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APCCAS
2006
IEEE
15 years 10 months ago
2006
IEEE
We described an H.264 decoder implemented with our design methodology, in which a system function model of transaction level is first captured in SystemC and refined into RTL with ...
160
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DATE
2004
IEEE
15 years 8 months ago
2004
IEEE
Architecture description languages are widely used to perform architecture exploration for application-driven designs, whereas the RT-level is the commonly accepted level for hard...
131
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HOTI
2005
IEEE
15 years 10 months ago
2005
IEEE
— A crucial part of any high-performance computing system is its interconnection network. In the OSMOSIS project, Corning and IBM are jointly developing a demonstrator interconne...
134
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ALIFE
2002
15 years 4 months ago
2002
Self-replicating loops presented to date are essentially worlds unto themselves, inaccessible to the observer once the replication process is launched. In this article we present t...
137
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DAC
2005
ACM
15 years 6 months ago
2005
ACM
This paper presents a novel synthesis algorithm that reduces the area needed for implementing multiplexers on an FPGA by an average of 18%. This is achieved by reducing the number...