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158
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JSA
2010
14 years 10 months ago
2010
The high chip-level integration enables the implementation of large-scale parallel processing architectures with 64 and more processing nodes on a single chip or on an FPGA device...
112
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VTC
2006
IEEE
2006
IEEE
Design and Implementation of Robust Time/Frequency Offset Tracking Algorithm for MIMO-OFDM Receivers
15 years 10 months ago
— In this paper, the robust time and frequency offset tracking algorithms and architecture for high throughput wireless local area network (WLAN) systems are presented. The desig...
150
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GRID
2004
Springer
15 years 9 months ago
2004
Springer
This paper reports on the design, implementation and performance evaluation of a suite of GridRPC programming middleware called Ninf-G Version 2 (Ninf-G2). NinfG2 is a reference i...
143
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HICSS
2007
IEEE
15 years 5 months ago
2007
IEEE
We describe the evolution of a statistical survey design visual language from a standalone design-time modelling language into an environment supporting design, coordination, exec...
124
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VLSID
2004
IEEE
16 years 4 months ago
2004
IEEE
Watermarking is the process that embeds data called a watermark into a multimedia object for its copyright protection. The digital watermarks can be visible to a viewer on careful...