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» Design and implementation of correlating caches
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ICCD
2008
IEEE
117views Hardware» more  ICCD 2008»
14 years 4 months ago
Two dimensional highly associative level-two cache design
High associativity is important for level-two cache designs [9]. Implementing CAM-based Highly Associative Caches (CAM-HAC), however, is both costly in hardware and exhibits poor s...
Chuanjun Zhang, Bing Xue
ICS
1995
Tsinghua U.
13 years 11 months ago
A Data Cache with Multiple Caching Strategies Tuned to Different Types of Locality
Current data cache organizations fail to deliver high performance in scalar processors for many vector applications. There are two main reasons for this loss of performance: the u...
Antonio González, Carlos Aliagas, Mateo Val...
OSDI
1994
ACM
13 years 8 months ago
Implementation and Performance of Application-Controlled File Caching
Traditional le system implementations do not allow applications to control le caching replacement decisions. We have implemented two-level replacement, a scheme that allows appl...
Pei Cao, Edward W. Felten, Kai Li
DATE
2010
IEEE
158views Hardware» more  DATE 2010»
14 years 16 days ago
Energy- and endurance-aware design of phase change memory caches
—Phase change memory (PCM) is one of the most promising technology among emerging non-volatile random access memory technologies. Implementing a cache memory using PCM provides m...
Yongsoo Joo, Dimin Niu, Xiangyu Dong, Guangyu Sun,...
HICSS
1994
IEEE
152views Biometrics» more  HICSS 1994»
13 years 11 months ago
Simple COMA Node Implementations
Shared memory architectures often have caches to reduce the number of slow remote memory accesses. The largest possible caches exist in shared memory architectures called Cache-On...
Erik Hagersten, Ashley Saulsbury, Anders Landin