788 search results - page 20 / 158 » Design and use of a system-level specification and verificat... |
DAC
1999
ACM
13 years 11 months ago
1999
ACM
Verification is one of the most critical and time-consuming tasks in today's design processes. This paper demonstrates the verification process of a 8.8 million gate design u...
DATE
2009
IEEE
14 years 2 months ago
2009
IEEE
This paper presents a design methodology for fully reconfigurable low-voltage Delta-Sigma converters as for instance used in next-generation wireless applications. The design metho...
ISCAS
2005
IEEE
14 years 1 months ago
2005
IEEE
— As across-chip wire delays exceed a clock cycle, interconnect pipelining becomes essential. However, the arbitrary insertion of flip-flops can change the differentials of lat...
HICSS
2007
IEEE
14 years 1 months ago
2007
IEEE
Systems using Software Agents (or Multi-Agent Systems, MAS) are becoming more popular within the development mainstream because, as the name suggests, an Agent aims to handle task...
DSD
2002
IEEE
14 years 11 days ago
2002
IEEE
In this paper we describe a methodology for the formal verification of a DSP chip using the HOL theorem prover. We used an iterative method to specify both the behavioral and stru...