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DAC
2005
ACM
14 years 8 months ago
Simulation based deadlock analysis for system level designs
In the design of highly complex, heterogeneous, and concurrent systems, deadlock detection and resolution remains an important issue. In this paper, we systematically analyze the ...
Xi Chen, Abhijit Davare, Harry Hsieh, Alberto L. S...
FDL
2004
IEEE
13 years 11 months ago
SystemC and OCAPI-xl Based System-Level Design for Reconfigurable Systems-on-Chip
Reconfigurability is becoming an important part of System-on-Chip (SoC) design to cope with the increasing demands for simultaneous flexibility and computational power. Current ha...
Kari Tiensyrjä, Miroslav Cupák, Kostas...
BIRTHDAY
2007
Springer
13 years 11 months ago
Automating Verification of Cooperation, Control, and Design in Traffic Applications
We present a verification methodology for cooperating traffic agents covering analysis of cooperation strategies, realization of strategies through control, and implementation of c...
Werner Damm, Alfred Mikschl, Jens Oehlerking, Erns...
DATE
1999
IEEE
123views Hardware» more  DATE 1999»
13 years 11 months ago
Accounting for Various Register Allocation Schemes During Post-Synthesis Verification of RTL Designs
This paper reports a formal methodology for verifying a broad class of synthesized register-transfer-level (RTL) designs by accommodating various register allocation/optimization ...
Nazanin Mansouri, Ranga Vemuri
CCR
2004
62views more  CCR 2004»
13 years 7 months ago
Methodological frameworks for large-scale network analysis and design
This paper emphasizes the need for methodological frameworks for analysis and design of large scale networks which are independent of specific design innovations and their advocac...
Antonis Papachristodoulou, Lun Li, John C. Doyle