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» Design as traversal and consequences: an exploration tool fo...
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ICCD
2007
IEEE
225views Hardware» more  ICCD 2007»
14 years 4 months ago
Fine grain 3D integration for microarchitecture design through cube packing exploration
Most previous 3D IC research focused on “stacking” traditional 2D silicon layers, so the interconnect reduction is limited to interblock delays. In this paper, we propose tech...
Yongxiang Liu, Yuchun Ma, Eren Kursun, Glenn Reinm...
ICCAD
2003
IEEE
144views Hardware» more  ICCAD 2003»
14 years 4 months ago
A High-level Interconnect Power Model for Design Space Exploration
— In this paper, we present a high-level power model to estimate the power consumption in semi-global and global interconnects. Such interconnects are used for communications bet...
Pallav Gupta, Lin Zhong, Niraj K. Jha
ICSE
2005
IEEE-ACM
14 years 7 months ago
Fluent-based web animation: exploring goals for requirements validation
We present a tool that provides effective graphical animations as a means of validating both goals and software designs. Goals are objectives that a system is expected to meet. Th...
Robert Chatley, Sebastián Uchitel, Jeff Kra...
ICCS
2004
Springer
14 years 1 months ago
Design of Interactive Environment for Numerically Intensive Parallel Linear Algebra Calculations
Problem Solving Environments have a well established position as an essential tool for computational science. We focus our attention in this article on how to provide parallel com...
Piotr Luszczek, Jack Dongarra
VLSID
2008
IEEE
150views VLSI» more  VLSID 2008»
14 years 8 months ago
PTSMT: A Tool for Cross-Level Power, Performance, and Thermal Exploration of SMT Processors
Simultaneous Multi-Threading (SMT) processors are becoming popular because they exploit both instruction-level and threadlevel parallelism by issuing instructions from different t...
Deepa Kannan, Aseem Gupta, Aviral Shrivastava, Nik...