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LCTRTS
2007
Springer
14 years 3 months ago
Addressing instruction fetch bottlenecks by using an instruction register file
The Instruction Register File (IRF) is an architectural extension for providing improved access to frequently occurring instructions. An optimizing compiler can exploit an IRF by ...
Stephen Roderick Hines, Gary S. Tyson, David B. Wh...
ISCAS
2005
IEEE
128views Hardware» more  ISCAS 2005»
14 years 2 months ago
Development of an audio player as system-on-a-chip using an open source platform
— Open source software are becoming more widely-used, notably in the server and desktop applications. For embedded systems development, usage of open source software can also red...
Pattara Kiatisevi, Luis Leonardo Azuara-Gomez, Rai...
ISCA
2010
IEEE
222views Hardware» more  ISCA 2010»
13 years 11 months ago
Cohesion: a hybrid memory model for accelerators
Two broad classes of memory models are available today: models with hardware cache coherence, used in conventional chip multiprocessors, and models that rely upon software to mana...
John H. Kelm, Daniel R. Johnson, William Tuohy, St...
SIGCOMM
2005
ACM
14 years 2 months ago
Improving accuracy in end-to-end packet loss measurement
Measurement and estimation of packet loss characteristics are challenging due to the relatively rare occurrence and typically short duration of packet loss episodes. While active ...
Joel Sommers, Paul Barford, Nick G. Duffield, Amos...
SENSYS
2003
ACM
14 years 2 months ago
Matching data dissemination algorithms to application requirements
A distinguishing characteristic of wireless sensor networks is the opportunity to exploit characteristics of the application at lower layers. This approach is encouraged by device...
John S. Heidemann, Fabio Silva, Deborah Estrin