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» Design issues for dynamic voltage scaling
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CODES
2005
IEEE
14 years 1 months ago
Power-smart system-on-chip architecture for embedded cryptosystems
In embedded cryptosystems, sensitive information can leak via timing, power, and electromagnetic channels. We introduce a novel power-smart system-on-chip architecture that provid...
Radu Muresan, Haleh Vahedi, Y. Zhanrong, Stefano G...
CHI
2002
ACM
14 years 7 months ago
Hierarchical faceted metadata in site search interfaces
One of the most pressing usability issues in the design of large web sites is that of the organization of search results. A previous study on a moderate-sized web site indicated t...
Jennifer English, Marti A. Hearst, Rashmi R. Sinha...
DAC
2003
ACM
14 years 8 months ago
Energy-aware MPEG-4 FGS streaming
-- In this paper, we propose an energy-aware MPEG-4 FGS video streaming system with client feedback. In this client-server system, the battery-powered mobile client sends its maxim...
Kihwan Choi, Kwanho Kim, Massoud Pedram
ICS
2009
Tsinghua U.
14 years 2 months ago
Adagio: making DVS practical for complex HPC applications
Power and energy are first-order design constraints in high performance computing. Current research using dynamic voltage scaling (DVS) relies on trading increased execution time...
Barry Rountree, David K. Lowenthal, Bronis R. de S...
DFT
2008
IEEE
106views VLSI» more  DFT 2008»
14 years 1 months ago
Built-In Proactive Tuning System for Circuit Aging Resilience
VLSI circuits in nanometer VLSI technology experience significant aging effects, which are embodied by performance degradation over operation time. Although this degradation can b...
Nimay Shah, Rupak Samanta, Ming Zhang, Jiang Hu, D...