Sciweavers

343 search results - page 34 / 69
» Design methodology for IRA codes
Sort
View
ISSRE
2008
IEEE
14 years 4 months ago
Detection and Prediction of Resource-Exhaustion Vulnerabilities
Systems connected to the Internet are highly susceptible to denial-of-service attacks that can compromise service availability, causing damage to customers and providers. Due to e...
João Antunes, Nuno Ferreira Neves, Paulo Ve...
DAC
2005
ACM
13 years 12 months ago
Smart diagnostics for configurable processor verification
This paper describes a novel technique called Embedded Test-bench Control (ETC), extensively used in the verification of Tensilica’s latest configurable processor. Conventional ...
Sadik Ezer, Scott Johnson
ISI
2005
Springer
14 years 3 months ago
Performance Study of a Compiler/Hardware Approach to Embedded Systems Security
Abstract. Trusted software execution, prevention of code and data tampering, authentication, and providing a secure environment for software are some of the most important security...
Kripashankar Mohan, Bhagirath Narahari, Rahul Simh...
ISCAS
1999
IEEE
124views Hardware» more  ISCAS 1999»
14 years 2 months ago
On the robustness of vector set partitioning image coders to bit errors
A vector enhancement of Said and Pearlman's Set Partitioning in Hierarchical Trees (SPIHT) methodology, named VSPIHT, has recently been proposed for embedded wavelet image co...
D. Mukherjee, S. K. Mitra
CODES
2005
IEEE
14 years 3 months ago
Comparing two testbench methods for hierarchical functional verification of a bluetooth baseband adaptor
The continuous improvement on the design methodologies and processes has made possible the creation of huge and very complex digital systems. Design verification is one of the mai...
Edgar L. Romero, Marius Strum, Wang Jiang Chau