343 search results - page 37 / 69 » Design methodology for IRA codes |
CODES
2006
IEEE
14 years 1 months ago
2006
IEEE
This paper presents a hw/sw codesign methodology based on BORPH, an operating system designed for FPGA-based reconfigurable computers (RC's). By providing native kernel suppo...
PARELEC
2006
IEEE
14 years 3 months ago
2006
IEEE
We have developed an application-driven methodology for implementing parallel and heterogeneous programmable platforms. We deploy our flow for network access platforms where we h...
CHI
2010
ACM
14 years 4 months ago
2010
ACM
Programming has recently become more common among ordinary end users of computer systems. We believe that these end-user programmers are not just coders but also designers, in tha...
DAC
2002
ACM
14 years 11 months ago
2002
ACM
The design of high-throughput large-state Viterbi decoders relies on the use of multiple arithmetic units. The global communication channels among these parallel processors often ...
VLSID
2006
IEEE
14 years 3 months ago
2006
IEEE
This tutorial focuses on advanced techniques to cope with the complexity of designing modern digital chips which are complete systems often containing multiple processors, complex...