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ICC
2007
IEEE
229views Communications» more  ICC 2007»
13 years 11 months ago
A Cross-Layer Design on the Basis of Multiple Packet Reception in Asynchronous Wireless Network
This paper concerns the cross-layer design between physical layer and MAC (Multiple Access Control) layer in asynchronous wireless random access network. The proposed cross-layer d...
Anxin Li, Mingshu Wang, Xiangming Li, Hidetoshi Ka...
ACSD
2009
IEEE
100views Hardware» more  ACSD 2009»
14 years 2 months ago
Scheduling Synchronous Elastic Designs
Asynchronous and latency-insensitive circuits offer a similar form of elasticity that tolerates variations in the delays of communication resources of a system. This flexibility ...
Josep Carmona, Jorge Júlvez, Jordi Cortadel...
INFOCOM
1996
IEEE
13 years 11 months ago
Integrated Control of Connection Admission, Flow Rate, and Bandwidth for ATM Based Networks
: We consider the combined control problem of connection admission, flow rate, and bandwidth allocation (capacity, service-rate) under nonstationary conditions. A fluid flow model ...
Andreas Pitsillides, Petros A. Ioannou, David Tipp...
ICDCS
2007
IEEE
14 years 1 months ago
Protocol Design and Optimization for Delay/Fault-Tolerant Mobile Sensor Networks
While extensive studies have been carried out in the past several years for many sensor applications, they cannot be applied to the network with extremely low and intermittent con...
Yu Wang, Hongyi Wu, Feng Lin, Nian-Feng Tzeng
ASYNC
2006
IEEE
72views Hardware» more  ASYNC 2006»
14 years 1 months ago
Fast Asynchronous Shift Register for Bit-Serial Communication
A fast asynchronous shift register is used as the serializer and de-serializer in a novel bit-serial on-chip communication link. The link employs two-phase transition-based LEDR e...
Rostislav (Reuven) Dobkin, Ran Ginosar, Avinoam Ko...