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» Design of a Robust 8-Bit Microprocessor to Soft Errors
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SIGCOMM
2009
ACM
14 years 2 months ago
Cross-layer wireless bit rate adaptation
This paper presents SoftRate, a wireless bit rate adaptation protocol that is responsive to rapidly varying channel conditions. Unlike previous work that uses either frame recepti...
Mythili Vutukuru, Hari Balakrishnan, Kyle Jamieson
TDSC
2010
111views more  TDSC 2010»
13 years 5 months ago
Using Underutilized CPU Resources to Enhance Its Reliability
—Soft errors (or Transient faults) are temporary faults that arise in a circuit due to a variety of internal noise and external sources such as cosmic particle hits. Though soft ...
Avi Timor, Avi Mendelson, Yitzhak Birk, Neeraj Sur...
ISCA
2007
IEEE
120views Hardware» more  ISCA 2007»
14 years 1 months ago
Examining ACE analysis reliability estimates using fault-injection
ACE analysis is a technique to provide an early reliability estimate for microprocessors. ACE analysis couples data from performance models with low level design details to identi...
Nicholas J. Wang, Aqeel Mahesri, Sanjay J. Patel
DSN
2006
IEEE
14 years 1 months ago
In-Register Duplication: Exploiting Narrow-Width Value for Improving Register File Reliability
Protecting the register value and its data buses is crucial to reliable computing in high-performance microprocessors due to the increasing susceptibility of CMOS circuitry to sof...
Jie Hu, Shuai Wang, Sotirios G. Ziavras
GLVLSI
2009
IEEE
113views VLSI» more  GLVLSI 2009»
13 years 11 months ago
Reducing parity generation latency through input value aware circuits
1 Soft errors caused by cosmic particles and radiation emitted by the packaging are an important problem in contemporary microprocessors. Parity bits are used to detect single bit ...
Yusuf Osmanlioglu, Y. Onur Koçberber, Oguz ...