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VLSID
1999
IEEE
99views VLSI» more  VLSID 1999»
14 years 3 hour ago
Array Index Allocation under Register Constraints in DSP Programs
Abstract Code optimization for digital signal processors DSPs has been identi ed as an important new topic in system-level design of embedded systems. Both DSP processors and algor...
Anupam Basu, Rainer Leupers, Peter Marwedel
ISLPED
2004
ACM
157views Hardware» more  ISLPED 2004»
14 years 1 months ago
4T-decay sensors: a new class of small, fast, robust, and low-power, temperature/leakage sensors
We present a novel temperature/leakage sensor, developed for high-speed, low-power, monitoring of processors and complex VLSI chips. The innovative idea is the use of 4T SRAM cell...
Stefanos Kaxiras, Polychronis Xekalakis
CF
2004
ACM
14 years 1 months ago
A first glance at Kilo-instruction based multiprocessors
The ever increasing gap between processor and memory speed, sometimes referred to as the Memory Wall problem [42], has a very negative impact on performance. This mismatch will be...
Marco Galluzzi, Valentin Puente, Adrián Cri...
VLSID
2004
IEEE
107views VLSI» more  VLSID 2004»
14 years 8 months ago
Performance Analysis of Inter Cluster Communication Methods in VLIW Architecture
With increasing demands for high performance by embedded systems, especially by digital signal processing applications, embedded processors must increase available instruction lev...
Sourabh Saluja, Anshul Kumar
CLUSTER
2006
IEEE
14 years 1 months ago
A Parallel Algorithm for the Solution of the Deconvolution Problem on Heterogeneous Networks
In this work we present a parallel algorithm for the solution of a least squares problem with structured matrices. This problem arises in many applications mainly related to digit...
Pedro Alonso, Antonio M. Vidal, Alexey L. Lastovet...