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» Design of large area electronics with organic transistors
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ERSA
2008
145views Hardware» more  ERSA 2008»
13 years 9 months ago
Multicore Devices: A New Generation of Reconfigurable Architectures
For two decades, reconfigurable computing systems have provided an attractive alternative to fixed hardware solutions. Reconfigurable computing systems have demonstrated the low c...
Steven A. Guccione
HPCA
2000
IEEE
13 years 12 months ago
Impact of Heterogeneity on DSM Performance
This paper explores area/parallelism tradeo s in the design of distributed shared-memory (DSM) multiprocessors built out of large single-chip computing nodes. In this context, are...
Renato J. O. Figueiredo, José A. B. Fortes
CHI
2011
ACM
12 years 11 months ago
Should I open this email?: inbox-level cues, curiosity and attention to email
The quantity of email people receive each day can be overwhelming. Previous research suggests that when handling email, individuals prioritize certain messages for attention over ...
Jaclyn Wainer, Laura Dabbish, Robert Kraut
MICRO
2009
IEEE
124views Hardware» more  MICRO 2009»
14 years 2 months ago
ZerehCache: armoring cache architectures in high defect density technologies
Aggressive technology scaling to 45nm and below introduces serious reliability challenges to the design of microprocessors. Large SRAM structures used for caches are particularly ...
Amin Ansari, Shantanu Gupta, Shuguang Feng, Scott ...
ISCA
2005
IEEE
144views Hardware» more  ISCA 2005»
14 years 1 months ago
Scalable Load and Store Processing in Latency Tolerant Processors
Memory latency tolerant architectures support thousands of in-flight instructions without scaling cyclecritical processor resources, and thousands of useful instructions can compl...
Amit Gandhi, Haitham Akkary, Ravi Rajwar, Srikanth...