4033 search results - page 728 / 807 » Design patterns in enterprise |
151
Voted
ICCD
2008
IEEE
16 years 22 days ago
2008
IEEE
— The increasing viability of three dimensional (3D) silicon integration technology has opened new opportunities for chip architecture innovations. One direction is in the extens...
132
Voted
ICCAD
2005
IEEE
16 years 20 days ago
2005
IEEE
In this paper we present NoCEE, a fast and accurate method for extracting energy models for packet-switched Network on Chip (NoC) routers. Linear regression is used to model the r...
164
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IUI
2010
ACM
15 years 10 months ago
2010
ACM
Computer-based geometry systems have been widely used for teaching and learning, but largely based on mouse-andkeyboard interaction, these systems usually require users to draw fi...
137
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ISCA
2009
IEEE
15 years 10 months ago
2009
IEEE
Recent research advocates memory streaming techniques to alleviate the performance bottleneck caused by the high latencies of off-chip memory accesses. Temporal memory streaming r...
140
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ARCS
2009
Springer
15 years 10 months ago
2009
Springer
The disparity between microprocessor clock frequencies and memory latency is a primary reason why many demanding applications run well below peak achievable performance. Software c...