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ICCD
2006
IEEE
128views Hardware» more  ICCD 2006»
14 years 3 months ago
Polaris: A System-Level Roadmap for On-Chip Interconnection Networks
Technology trends are driving parallel on-chip architectures in the form of multi-processor systems-on-a-chip (MPSoCs) and chip multi-processors (CMPs). In these systems the incre...
Vassos Soteriou, Noel Eisley, Hangsheng Wang, Bin ...
ISCA
2008
IEEE
188views Hardware» more  ISCA 2008»
14 years 1 months ago
MIRA: A Multi-layered On-Chip Interconnect Router Architecture
Recently, Network-on-Chip (NoC) architectures have gained popularity to address the interconnect delay problem for designing CMP / multi-core / SoC systems in deep sub-micron tech...
Dongkook Park, Soumya Eachempati, Reetuparna Das, ...
RSP
2006
IEEE
120views Control Systems» more  RSP 2006»
14 years 24 days ago
A Case Study of Design Space Exploration for Embedded Multimedia Applications on SoCs
Embedded real-time multimedia applications usually imply data parallel processing. SIMD processors embedded in SOCs are cost-effective to exploit the underlying parallelism. Howev...
Isabelle Hurbain, Corinne Ancourt, François...
DSD
2008
IEEE
139views Hardware» more  DSD 2008»
13 years 8 months ago
Discrete Particle Swarm Optimization for Multi-objective Design Space Exploration
Platform-based design represents the most widely used approach to design System-On-Chip (SOC) applications. In this context, the Design Space Exploration (DSE) phase consists of o...
Gianluca Palermo, Cristina Silvano, Vittorio Zacca...
RSP
2003
IEEE
111views Control Systems» more  RSP 2003»
14 years 2 days ago
Exploring the Probabilistic Design Space of Multimedia Systems
In this paper, we propose the novel concept of probabilistic design for multimedia systems and a methodology to quickly explore such design space at an early design stage. The pro...
Shaoxiong Hua, Gang Qu, Shuvra S. Bhattacharyya