96 search results - page 12 / 20 » Design space exploration of caches using compressed traces |
TCAD
2002
13 years 8 months ago
2002
System-on-a-chip (SOC) platform manufacturers are increasingly adding configurable features that provide power and performance flexibility in order to increase a platform's ap...
CSREAESA
2006
13 years 10 months ago
2006
Modern processors have a small on-chip local memory for instructions. Usually it is in the form of a cache but in some cases it is an addressable memory. In the latter, the user is...
CODES
2008
IEEE
14 years 3 months ago
2008
IEEE
Open Core Protocol (OCP) is a standard on-chip core interface specification. The current release is flexible and configurable to support the communication needs of a wide range...
ICDCS
2007
IEEE
14 years 2 months ago
2007
IEEE
State-of-the-art networked storage servers are equipped with increasingly powerful computing capability and large DRAM memory as storage caches. However, their contribution to the...
ICCD
2004
IEEE
14 years 5 months ago
2004
IEEE
Existing schemes for cache energy optimization incorporate a limited degree of dynamic associativity: either direct mapped or full available associativity (say 4-way). In this pap...