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CGO
2006
IEEE
15 years 12 months ago
Thread-Shared Software Code Caches
Software code caches are increasingly being used to amortize the runtime overhead of dynamic optimizers, simulators, emulators, dynamic translators, dynamic compilers, and other t...
Derek Bruening, Vladimir Kiriansky, Timothy Garnet...
ISCA
2005
IEEE
128views Hardware» more  ISCA 2005»
15 years 11 months ago
An Evaluation Framework and Instruction Set Architecture for Ion-Trap Based Quantum Micro-Architectures
: The theoretical study of quantum computation has yielded efficient algorithms for some traditionally hard problems. Correspondingly, experimental work on the underlying physical...
Steven Balensiefer, Lucas Kreger-Stickles, Mark Os...
HPCA
1998
IEEE
15 years 10 months ago
Address Translation Mechanisms In Network Interfaces
Good network hardware performance is often squandered by overheads for accessing the network interface (NI) within a host. NIs that support user-level messaging avoid frequent ope...
Ioannis Schoinas, Mark D. Hill
SIGMETRICS
1998
ACM
187views Hardware» more  SIGMETRICS 1998»
15 years 10 months ago
An Analytic Behavior Model for Disk Drives with Readahead Caches and Request Reordering
Modern disk drives read-ahead data and reorder incoming requests in a workload-dependent fashion. This improves their performance, but makes simple analytical models of them inade...
Elizabeth A. M. Shriver, Arif Merchant, John Wilke...
ASPLOS
2006
ACM
15 years 9 months ago
SlicK: slice-based locality exploitation for efficient redundant multithreading
Transient faults are expected a be a major design consideration in future microprocessors. Recent proposals for transient fault detection in processor cores have revolved around t...
Angshuman Parashar, Anand Sivasubramaniam, Sudhanv...