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» Design space exploration revisited
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DATE
2003
IEEE
86views Hardware» more  DATE 2003»
15 years 11 months ago
Layered, Multi-Threaded, High-Level Performance Design
A primary goal of high-level modeling is to efficiently explore a broad design space, converging on an optimal or near-optimal system architecture before moving to a more detaile...
Andrew S. Cassidy, JoAnn M. Paul, Donald E. Thomas
154
Voted
ISCA
2000
IEEE
111views Hardware» more  ISCA 2000»
15 years 10 months ago
HLS: combining statistical and symbolic simulation to guide microprocessor designs
As microprocessors continue to evolve, many optimizations reach a point of diminishing returns. We introduce HLS, a hybrid processor simulator which uses statistical models and sy...
Mark Oskin, Frederic T. Chong, Matthew K. Farrens
136
Voted
CHI
2009
ACM
16 years 6 months ago
The design and evaluation of multi-finger mouse emulation techniques
We explore the use of multi-finger input to emulate full mouse functionality, such as the tracking state, three buttons, and chording. We first present the design space for such t...
Justin Matejka, Tovi Grossman, Jessica Lo, George ...
191
Voted
ICAISC
2010
Springer
15 years 8 months ago
Computer Assisted Peptide Design and Optimization with Topology Preserving Neural Networks
Abstract. We propose a non-standard neural network called TPNN which offers the direct mapping from a peptide sequence to a property of interest in order to model the quantitative ...
Jörg D. Wichard, Sebastian Bandholtz, Carsten...
ISCC
2005
IEEE
116views Communications» more  ISCC 2005»
15 years 11 months ago
Link Buffer Sizing: A New Look at the Old Problem
We revisit the question of how much buffer an IP router should allocate for its Droptail FIFO link. For a long time, setting the buffer size to the bitrate-delay product has been ...
Sergey Gorinsky, Anshul Kantawala, Jonathan S. Tur...