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» Design with race-free hardware semantics
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PEPM
2009
ACM
15 years 8 months ago
Static Consistency Checking for Verilog Wire Interconnects
The Verilog hardware description language has padding semantics that allow designers to write descriptions where wires of different bit widths can be interconnected. However, many ...
Cherif Salama, Gregory Malecha, Walid Taha, Jim Gr...
PPPJ
2009
ACM
14 years 3 months ago
Automatic parallelization for graphics processing units
Accelerated graphics cards, or Graphics Processing Units (GPUs), have become ubiquitous in recent years. On the right kinds of problems, GPUs greatly surpass CPUs in terms of raw ...
Alan Leung, Ondrej Lhoták, Ghulam Lashari
EUROMICRO
2009
IEEE
14 years 3 months ago
Foundations for a Model-Driven Integration of Business Services in a Safety-Critical Application Domain
—Current architectures for systems integration provide means for forming agile business processes by manually or dynamically configuring the components. However, a major challeng...
Richard Mordinyi, Thomas Moser, eva Kühn, Ste...
DSN
2008
IEEE
14 years 3 months ago
A fault-tolerant directory-based cache coherence protocol for CMP architectures
Current technology trends of increased scale of integration are pushing CMOS technology into the deepsubmicron domain, enabling the creation of chips with a significantly greater...
Ricardo Fernández Pascual, José M. G...
IEEEPACT
2007
IEEE
14 years 3 months ago
Automatic Correction of Loop Transformations
Loop nest optimization is a combinatorial problem. Due to the growing complexity of modern architectures, it involves two increasingly difficult tasks: (1) analyzing the profita...
Nicolas Vasilache, Albert Cohen, Louis-Noël P...