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» Designing Benchmarks for P2P Systems
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ICS
2007
Tsinghua U.
14 years 1 months ago
Cooperative cache partitioning for chip multiprocessors
This paper presents Cooperative Cache Partitioning (CCP) to allocate cache resources among threads concurrently running on CMPs. Unlike cache partitioning schemes that use a singl...
Jichuan Chang, Gurindar S. Sohi
PADS
2005
ACM
14 years 29 days ago
The WarpIV Simulation Kernel
ct This paper provides an overview of the WarpIV Simulation Kernel that was designed to be an initial implementation of the Standard Simulation Architecture (SSA). WarpIV is the ne...
Jeffrey S. Steinman
ISPD
2004
ACM
146views Hardware» more  ISPD 2004»
14 years 25 days ago
Power-aware clock tree planning
Modern processors and SoCs require the adoption of poweroriented design styles, due to the implications that power consumption may have on reliability, cost and manufacturability ...
Monica Donno, Enrico Macii, Luca Mazzoni
DAC
2010
ACM
13 years 7 months ago
Instruction cache locking using temporal reuse profile
The performance of most embedded systems is critically dependent on the average memory access latency. Improving the cache hit rate can have significant positive impact on the per...
Yun Liang, Tulika Mitra
SIGMOD
2009
ACM
137views Database» more  SIGMOD 2009»
14 years 7 months ago
Advances in flash memory SSD technology for enterprise database applications
The past few decades have witnessed a chronic and widening imbalance among processor bandwidth, disk capacity, and access speed of disk. According to Amdhal's law, the perfor...
Sang-Won Lee, Bongki Moon, Chanik Park