397 search results - page 17 / 80 » Designing Fast Asynchronous Circuits |
ASYNC
2000
IEEE
14 years 1 months ago
2000
IEEE
New design technologies rely on truly reusable IP blocks with simple means of assembly. Asynchronous methodologies could be a promising option to implement these requirements. Pro...
ESANN
2008
13 years 10 months ago
2008
In this paper we present an original neighborhood mechanism for WTM self-organizing Kohonen map implemented in CMOS 0.18 m process. Proposed mechanism is an asynchronous circuit an...
FPGA
2007
ACM
14 years 2 months ago
2007
ACM
A reconfigurable logic element (LE) is developed for use in constructing a NULL Convention Logic (NCL) FPGA. It can be configured as any of the 27 fundamental NCL gates, including...
ASYNC
1998
IEEE
14 years 27 days ago
1998
IEEE
Analogue to digital (A-D) converters with a xed conversion time are subject to errors due to metastability. These errors will occur in all converter designs with a bounded time fo...
ASYNC
2000
IEEE
14 years 1 months ago
2000
IEEE
This paper brings together a selection of creative circuit designs and ideas that Charles Molnar devised while working at Sun Microsystems Laboratories. The circuits offer fast im...