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» Designing Fast Asynchronous Circuits
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SAC
2006
ACM
14 years 1 months ago
Interval-based robust statistical techniques for non-negative convex functions, with application to timing analysis of computer
: In chip design, one of the main objectives is to decrease its clock cycle; however, the existing approaches to timing analysis under uncertainty are based on fundamentally restri...
Michael Orshansky, Wei-Shen Wang, Martine Ceberio,...
ITC
2003
IEEE
148views Hardware» more  ITC 2003»
14 years 22 days ago
HyAC: A Hybrid Structural SAT Based ATPG for Crosstalk
As technology evolves into the deep sub-micron era, signal integrity problems are growing into a major challenge. An important source of signal integrity problems is the crosstalk...
Xiaoliang Bai, Sujit Dey, Angela Krstic
OOPSLA
2004
Springer
14 years 25 days ago
Transparent proxies for java futures
A proxy object is a surrogate or placeholder that controls access to another target object. Proxies can be used to support distributed programming, lazy or parallel evaluation, ac...
Polyvios Pratikakis, Jaime Spacco, Michael W. Hick...
ICCAD
2005
IEEE
125views Hardware» more  ICCAD 2005»
14 years 4 months ago
Robust mixed-size placement under tight white-space constraints
A novel and very simple correct-by-construction top-down methodology for high-utilization mixed-size placement is presented. The PolarBear algorithm combines recursive cutsize-dri...
Jason Cong, Michail Romesis, Joseph R. Shinnerl
ISPD
2006
ACM
175views Hardware» more  ISPD 2006»
14 years 1 months ago
mPL6: enhanced multilevel mixed-size placement
The multilevel placement package mPL6 combines improved implementations of the global placer mPL5 (ISPD05) and the XDP legalizer and detailed placer (ASPDAC06). It consistently pr...
Tony F. Chan, Jason Cong, Joseph R. Shinnerl, Kent...