63 search results - page 10 / 13 » Designing High Bandwidth On-Chip Caches |
FPGA
2005
ACM
14 years 1 months ago
2005
ACM
Floating-point Sparse Matrix-Vector Multiplication (SpMXV) is a key computational kernel in scientific and engineering applications. The poor data locality of sparse matrices sig...
MICRO
2010
IEEE
13 years 5 months ago
2010
IEEE
Virtualization has been rapidly expanding its applications in numerous server and desktop environments to improve the utilization and manageability of physical systems. Such prolif...
HPCA
2000
IEEE
13 years 12 months ago
2000
IEEE
With increasing chip densities, future microprocessor designs have the opportunity to integrate many of the traditional systemlevel modules onto the same chip as the processor. So...
CODES
2000
IEEE
13 years 12 months ago
2000
IEEE
Memory interleaving is a cost-efficient approach to increase bandwidth. Improving data access locality and reducing memory access conflicts are two important aspects to achieve hi...
IPPS
1998
IEEE
13 years 11 months ago
1998
IEEE
We have built an eight node SMP cluster called COMPaS (Cluster Of Multi-Processor Systems), each node of which is a quadprocessor Pentium Pro PC. We have designed and implemented a...