2945 search results - page 119 / 589 » Designing and Implementing Malicious Hardware |
113
Voted
ICASSP
2011
IEEE
14 years 8 months ago
2011
IEEE
In this paper, we investigate the opportunities offered by floatingpoint arithmetics in enabling an assembly and intrinsics free highlevel language based development. We compare ...
120
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DAC
1994
ACM
15 years 8 months ago
1994
ACM
-- In this paper, a tool to aid pipelined processor instruction set implementation is described. The purpose of the tool is to choose from among design alternatives a design that m...
134
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CODES
2006
IEEE
15 years 10 months ago
2006
IEEE
Heteregenous multiprocessor SoCs are becoming a reality, largely due to the abundance of transistors, intellectual property cores and powerful design tools. In this project, we ex...
159
Voted
EUROMICRO
2006
IEEE
15 years 10 months ago
2006
IEEE
One area of the web services architecture yet to be standardised is that of fault tolerance for services. At the same time, WS-BPEL is moving from a de facto standard to an OASIS ...
ISCAS
2005
IEEE
15 years 10 months ago
2005
IEEE
- This paper deals with the efficient realization of a 128-pt FFT/IFFT processor for application in IEEE 802.15.3a standard. The 128-pt FFT/IFFT architecture has been designed by d...